Multi-Application Multi-Processor Synthesis (MAMPS)
Multiprocessor systems-on-chip (MPSoC) are being developed in
increasing numbers to support the high number of applications
running on modern embedded systems. Designing and programming such
systems prove to be a major challenge. Most of the current design
methodologies rely on creating the design by hand, and are therefore
error-prone and time-consuming. This also limits the number of
design points that can be explored. While some efforts have been
made to automate the flow and raise the abstraction level, these are
limited to single-application designs.
MAMPS design methodology allows to generate and program MPSoC
designs in a systematic and automated way for multiple applications.
The architecture is automatically inferred from the application
specifications, and customized for it. The flow is ideal for fast
design space exploration in MPSoC systems. We present results of a
case study to compute the buffer-throughput trade-offs in reallife
applications, H263 and JPEG decoders.
Multi-Application Multi-Processor Simulation (MAMPSim)
Modern multi-media systems support a large number of applications, running in different combinations. These applications result in exponential number
of use-cases. With the introduction of multi-processor systems-on-chip, development of parallel programs for these applications and their performance evaluation
is becoming increasingly difficult.
We present MAMPSIM (Multi-Application Multi-Processor Simulation)-- an FPGA-based simulation methodology for performance evaluation of multiple applications
modeled as SDF Graphs (SDF), on a multi-processor platform. Our technique is scalable as larger FPGAs are available to simulate
designs with a large number of applications and use-cases. The largest Vertex-4 device from Xilinx can be configured to have about 97 microblaze processors. Support for such
a large number of processors makes our approach very attractive. Our simulation technique is at least 16 times faster than an efficient software solution. To use the tools, three types of input files are required.
Details of the structure of these files is described below.
CA-based Multi-processor System on Chip (CA-MPSoC)
Modern multi-media systems support a large number of applications, running in different combinations.
These applications result in exponential number of use-cases. With the introduction of multi-processor
systems-on-chip, development of parallel programs for these applications and their performance evaluation
is becoming increasingly difficult.
We present a fully automated design flow (CA-MPSoC) to generate communication assist (CA)-based multiprocessor
systems. A worst-case performance model of our CA is proposed so that the performance of the CA-based
platform can be analyzed before its implementation. The design flow provides performance estimates and
timing guarantees for both hard real-time and soft real-time applications.
To simplify the testing of newly created or generated MP SoC designs and mapping of various applications onto them, a SoC with a built in web server has been made, which runs on a Xilinx University Program Virtex II Pro (XUPV2P) board. The web server, which runs on a separate MicroBlaze core from the MP SOC, offers a means for the user to communicate in realtime with the MP SoC. This allows for the alteration of timeconstraints or priorities and also offers the possibility of graphical and numerical feedback from the system on a remote computer. The JavaScript based web client, introduced in chapter 4, show some of the possibilities the web server based system offers.
In the appendices of this website, which is also downloadable as a report in .PDF format in appendix A.3, a detailed step-by-step description of the creation proces of a web server on a Xilinx FPGA board, using the EDK Base System Builded, is presented. Additionally, the code for both the software and hardware, as well as the JavaScript web client are available in the appendices.
MAMPS/ MAMPSim/ CA-MPSoC Tool EvaluationYou can login
to evaluate the tool and generate a complete MPSoC platform. (An
account can be obtained by contacting Akash.)
Sample Generated PlatformHere are a few example MpSoC
platforms generated using our MAMPS tool to be used for Xilinx
University Virtex II Pro Board (XUPV2P). (Please use Xilinx ISE 7.1i
and EDK 7.1i (or higher) for synthesis.)
Sample XML SpecificationsHere are a few graphs which can be
used to evaluate the MAMPS tool.
*These graphs were generated using SDF3 tool.
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