The timed version of synchronous (or static) dataflow (SDF) is a powerful tool for modeling the timing behavior of real-time systems. By analyzing timed SDF models of systems, we are able to prove or derive their worst-case performance guarantees, i.e. worst-case throughput and latency.
Nevertheless, in everyday engineering practice, when dealing with large designs, flat SDF models are often impractical in the sense that the increase in the size of the model adversely affects the readability and mastery of complexity.
To mitigate these effects, hierarchical synchronous (static) dataflow models have been introduced. These are where an SDF graph can be encapsulated into a composite SDF actor. This way systems can be designed in a modular and scalable way enhancing readability and mastery of complexity.
Still, from timing analysis perspective, if we need to derive worst-case performance metrics from such a model, we need to flatten the structure, which brings us back to square one where again the analysis performance itself is adversely affected by the model size.
In this assignment, you will contribute to development and tool implementation of a systematic methodology for component-based worst-case performance analysis SDF graphs. In the methodology, we shall make use of the hierarchy and max-plus algebraic semantics of SDF to attain scalable and natural worst-case performance analysis algorithms for hiearachical SDF structures.
Initial steps towards such an analysis have been made. Still, further work is needed to generalize it to a wider collection of SDF structures as well as to insert the methodology into the SDF3 tool.
The assignment will give you the opportunity to get acquainted with model-based design for contemporary real-time embedded systems as well as the underlying mathematical formalisms employed to derive effective and powerful timing analysis techniques.
Basic concepts in model-based design and real-time systems
Good knowledge of C++
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