The increasing number of transitors that can be integrated on a single chip and the increasing complexity of multi-media applications have created a large design-productivity gap. The next generation of System-on-Chip (SoC) architectures on which multi-media applications are to be run should support a smooth integration of concurrently operating Intellectual Property (IP) components in order to satisfy the performance requirements as well as the need for design-prodictivity improvements. Network-on-Chip (NoC) based multi-processor platforms, which replace classic bus-based processor platforms, seem favourable for future multi-media systems because of their flexibility and scalability. NoC-based platforms include several core building blocks, which are also called nodes. Examples of such nodes are general-purpose or application-specific processors, memories of different types and sizes, I/O nodes and accelerator nodes. The nodes are connected via interfaces to on-chip networks. These networks form the key to the scalability. Compared to shared busses, such networks generally enable to interconnect a larger number of nodes without quickly running into a lack of communication bandwidth. The key to the flexibility of NoC-based platforms is the possibility of replacing nodes without the necessity to change the on-chip networks. This eases reuse of IP components that can serve as a node in the NoC-based platform. An essential aspect of this flexibility is standardisation of the interface to the on-chip networks, which concerns a combination of both hardware and software. In case an IP component satisfies the interface specifications (both hardware and software parts), it can be used as a core building block.
The PreMaDoNa project presumes NoC-based platforms as a basis for executing multi-media applications and pursues a methodology for designing NoC-based multi-media systems in a predictable way such that non-functional requirements can be guaranteed, while still being able to dynamically match quality with the available resources. Such a methodology facilitates the design of correct and predictable embedded systems in a cost and time-efficient way. The PreMaDoNa project is organised in three tracks, which are discussed in more detail below.
This track is mainly concerned with the definition of a system architecture in the form of a set of services or application program interfaces (API) (Such APIs provide sufficient information for assembler or compiler designers). For a classic processor, the APIs more or less correspond with the instruction-set architecture (ISA). Commonly, the service level of classic processors is raised by adding an operating system (OS) layer. Such OS layer defines often over 100 additional APIs (OS-calls) including standardised functionality for file, process and I/O management. For a NoC-based architecture, the level of services must be risen further to include not only computation services but also services for performing communication between all kinds of nodes. The latter should be independent of the type of nodes since it should be possible to replace for example a MIPS by an ARM core. The OS layer for a NoC-based architecture should furthermore include a resource manager that controls all the computation, communication, memory and I/O resources in order to shield the applications from the actual hardware. For multi-media applications that can be performed with different perceived qualities, the resource manager has yet another task; it has to negotiate with the applications on the amount of resources they get. The overall goal is to optimise the perceived quality of all applications combined, while still being able to meet real-time constrains. Summarising, the resource manager receives requests from the applications for services, allocates resource budgets and performs global scheduling tasks. With this approach, tradeoffs between quality and performance can be made for each running application.
Next to actually designing and implementing a resource manager, another challenge in this track is to model the components of the system architecture in a formalism that allows reasoning about performance, timing, energy and memory utilisation. To make such a model predictable (e.g., analysis of the model should provide accurate information), non-predictable components in the system architecture should be avoided. Caches can for example be replaced by scratch-pad RAM or they can be made software-controlable. In addition, it should be possible to guarantee upper bounds on the delay for the communication paths between nodes. To develop an adequate model and be able to guarantee non-functional requirements, both the architecture and its implementation in terms of logic blocks have to be considered. Such logic blocks perform well-defined functions (computation, communication and interfaces) and are implemented with a combination of hardware and software.
The expected results of this track are:
- Definition of a NoC-based platform
- Implementation of the network interfaces
- Design and implementation of a resource manager
- A prototype realisation in FPGA that demonstrates the core functionality (especially the network interfaces)
- An architecture model for mapping purposes
- The mapping of two multi-media applications: FM radio and Graphics Texture Mapping
To satisfy non-functional requirements regarding for example latency and throughput, many design iterations may be required. There are several reasons for this:
- The architecture and implementation do not always behave predictable (see also track 1)
- The application requirements fluctuate dynamically (see also track 3)
- The mapping is not predictable, i.e., there is a mismatch between what tools tell you regarding non-functional properties and what you ultimately get realised on the platform
This track aims at reducing the number of design iterations by taking non-functional requirements into account within the whole application modelling and mapping trajectory. This means that:
- Models of computation (MoC) should be adequate to deal with non-functional requirements
- Analysis tools should allow sufficient reasoning about non-functional properties
- The mapping of applications on the platform should satisfy the non-functional requirements
The architecture developed in track 1 should have sufficient hooks to make such a predictable mapping possible. As mentioned, in case of unpredictable elements, either predictable alternatives should be provided or sufficient compile-time control should be allowed.
The expected results of this track are:
A MoC for describing applications supporting predictable design
To derive this MoC, the experience with POOSL, YAPI and SDF will be used. The main concern is a method for annotating the application model with implementation decisions. In this way, analysis of the MoC guards the correct and predictable functioning of the system, while incrementally adding implementation decisions. For other design tasks, existing methodologies are used.
A mapping environment with tools
This environment supports the design methodology. It takes the application and architecture as input and analyses non-functional aspects of the application like timing and buffering requirements. It improves time-efficiency and enables to verify the correctness of the design. The tool will be integrated with other design tools such that the analysis can be performed at various stages of the design flow.
Modelling of two appplications
The FM radio and Graphics Texture Mapping will be modelled in the developed MoC.
Track 3: Demonstrating Predictable Mapping of Highly Dynamic Multi-Media Applications on a NoC-based Platform
Future multi-media applications have to deal with changing resource availability. Instead of turning off an application in case of research shortage, it is better to scale down its perceived quality such that real-time constraints can still be met. Scaling is also neede because the same application has to run on different platforms and under various conditions.
This track studies applications containing characteristics representative for future mutli-media. Because the focus of PreMaDoNa is on predictable design, these applications should allow scalability of their processing demands by tuning their perceived quality. A mapping of a demonstrator application is required to show the mapping methodology and test the mapping environment. The main demonstrator is video object coding (MPEG4). It will be mapped to a level of detail that a simulation shows correctness of the functional and non-functional requirements. Two other demonstrators will be mapped to a level of detail that only the timing and buffer requirements are verified.
The expected results of this track are:
- A scalable version of video object coding (MPEG4)
- A QoS protocol and implementation allowing the application to negotiate with the resource manager
- A complete modelling and mapping of video object coding running on the NoC platform developed in track 1
- It will be shown that the proposed design methodology saves a lot of design iterations
- It will be shown that NoC-based platforms can be used as an adequate target for mutli-media applications with stringent real-time constraints
- It will be shown that at run-time, application demands can be matched with the available resources of the NoC platform
To achieve above goals and results, a set of tasks is defined, which are listed below. Their relationship and interaction is indicated in the following picture.
- T1: NoC Architecture. Definition of a NoC-based platform in terms of API services
- T2: NoC Implementation. Implementation of the NoC-based platform in terms of logic blocks. The blocks will be modelled in a formalism that allows reasoning about timing, resource load and memory utilisation. A prototype of the implementation is realised in FPGA.
- T3: Resource Management. The resource manager receives requests for the usage of resources, negotiates with the QoS application layer on these requirements and performs global scheduling and assignment of tasks to the resources.
- T4: QoS Management. A QoS layer in the application scales the processing of the application depending on the resource budgets assigned to the application by the resource manager. This layer contains a QoS controller that gives priority to computations that increase the perceived quality the most. For example, some objects should be displayed with high resolution, while other objects may be skipped for a few frames.
- T5: Video Object Coding Demonstrator. This application is made available from LogicaCMG. An investigation is performed to identify and characterise dynamics in object-based video applications in general. Moreover, these applications are profiled to derive parameterised espressions for the computational requirements of objects. These expressions are used by the resource manager to assign resource budgets to objects and jobs. The shape-coding application is considered in more detail. The main challange is to make the underlying algorithms scalable and to program them. The resulting program is then expressed in the MoC developed in the PreMaDoNa project. Architecture independent transformations and subsequently platform specific transformations are performed to complete the mapping on the NoC-based platform developed in task T1.
- T6: Predictable Mapping. The focus is on analysis of a computational model of the application annotated with implementation decisions from the model of the platform (see also task T2). Other required methods and tools will be reused as much as possible.
- T7: Simulation. A simulator for verifying the analysis from task T6 will be borrowed from another project.
- T8: Application Case Studies. Two additional applications (FM radio and Graphics Texture Mapping) will be implemented to a level of detail that allows timing properties and memory utilisation.