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The Architecture Simulator
The architecture simulator is capable of simulating a distributed system
consisting of processing nodes using an interconnection network. The nodes
communicate with each other by sending messages over the network. Every node
in the architecture simulator corresponds exactly to a partition in the
parker. The architecture simulator has three tasks:
Application code is not interpreted, but run on the host machine as
native machine code. Code augmentation  is used to
keep account of the execution cycles of the application. Every basic
block of the application code is enhanced with some special instructions
that increment the execution cycle counter and checks whether this node
has exceeded its allocated running time. This augmentation is done with
a special extension of the GNU C++ compiler.
- Executing the partition at every processor node.
The simulator has to check at regular intervals whether the
simulated time for one node is not advancing too much with respect
to the other nodes in the system. If a certain margin has been
exceeded, the running node is suspended in order to allow the other
nodes to catch up. This is vital for simulations that have nodes
with unbalanced work load.
- Handling the messages that are sent from one node to another. To
accurately calculate the communication performance, the simulator
uses a realistic model of the architecture. Message passing is
based on the OSI model for computer networks, and covers the
transport, network and data link layers. The simulator allows the
user to vary a number of parameters for each of those layers.
The current version of the simulator uses E-cube routing in a 2-D
mesh topology, but more topologies and routing strategies are expected
to be developed in the near future.
- Performance analysis of the processor nodes and communication
channels. By means of a configuration file, it is possible to
selectively monitor a number of events in the simulator. The
results are written to a trace file, which can subsequently be
analysed by further tools, allowing the user to extract many
different aspects of the architecture performance.