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Code generation

The VHDL compiler is built using the front end from CLSI. This front-end produces an annotated abstract syntax tree on which the static semantic analysis has already been performed. This analysis includes type checking, scope resolution, and overload resolution. Using a library the abstract syntax tree can be read by the back-end, and subsequently manipulated. The back-end itself is written in C, and implements a reasonably large subset of VHDL.

Thanks to the high semantic level of the runtime organisation, the job of the compiler is relatively easy. It identifies the hierarchy of VHDL entities. At the bottom of this hierarchy we find the individual processes. The compiler back end divides the processes into a number of partitions. Every partition is meant to be executed on a single node in the network.

The current version of the compiler contains a simple-minded partitioner that introduces a new partition to every process.