Kees Goossens, Professor

Position

As of January 2010, full-time full professor in Real-Time Embedded Systems
in the Electronic Systems group
in the Electrical Engineering faculty
at the Eindhoven University of Technology (TU/e).

The Eindhoven University of Technology is ranked high in university rankings. It is the best Netherlands university, according to the Times Higher Education Supplement and the fiftieth best university in the world, according to the THES ranking.

Again the TUE is number 1 worldwide in research with industry!

News

In the context of the BENEFIC european project, a fully-funded PhD position (4 years) and a postdoc position (24 months) are available now on the topic of virtualisation of adaptive real-time applications in embedded systems. Please submit your application now.
The CompSOC team, platform, and research are now on the web at this CompSOC site.
We released a new Version 2.0 of DRAMPower, the Open Source DRAM Power and Energy Estimation Tool.
This version features many important improvements, such as significantly improved analysis speed (at least 10x), enabling analysis of much larger traces, as well as support for LPDDR/LPDDR2 and Wide I/O memories. The results of this version have furthermore been verified by Kaiserslautern University of Technology using equivalent circuit-level SPICE simulations, which established that the error of the tool is less than 2 percent for all memory operations of any granularity for all memories supported by DRAMPower.
We received the HiPEAC award for our 2012 DAC paper "Run-time power-down strategies for real-time SDRAM memory controllers".
We often have open PhD positions in the Electronic Systems group on topics such as real-time (predictability), performance virtualisation (a.k.a. temporal isolation, composability), networks on chip, SDRAM memory controllers, energy & power minimisation/minimization, dataflow formalisms (SDF3) for performance evaluation, etc. Inquire directly (see email on contact page).

Research Topics

real-time embedded multi-processor systems

composability (cf. virtualisation, partitioning), especially of temporal behaviour
predictability, for real-time applications
abstraction, especially transaction-based communication-centric debug
real-time microkernels, real-time operating systems
models of computation and models of execution

memory controllers

reducing complexity, e.g. through compositional architectures and analyses

low power for real-time applications

variability in all its aspects

all aspects of networks on chip

especially the Aethereal Network on Chip (NOC) developed since 2001 by Philips/NXP Research
network on chip design flows
hardwired networks on chip in FPGAs
network on chip as test access mechanism (TAM)
uses of networks on chip, e.g. for internet router crossbars
communication protocols

See the Research and Publication pages for more details.

Much of this research has been performed as part of national and international research projects. Running projects are: BENEFIC, Cobra, Flextiles, NEST, OpenES, T-CREST.
Finished finished projects are: 3DIM3, COMCAS, INDEXYS, MESA, NEVA, SCALOPES, TSAR.

All the research is in collaboration with MSc and PhD students, postdocs, Electronics Systems staff, and other researchers at NXP Semiconductors, Delft university of technology, and other (Dutch) universities.

Other Positions

TODAES 2009-present Editorial board member for the Association for Computing Machinery (ACM) Transactions on Design Automation of Electronic Systems.
DAEM 2006-present Associate editor for the Springer Journal of Design Automation of Embedded Systems.
IJECRTS 20011-2013 Editorial Review Board member of the Resources Management Association (IRMA) International Journal of Embedded and Real-Time Communication Systems.
CDT 2008 Guest editor for the IET Computers and Digital Techniques special issue on networks on chip.
DAEM 2011 Guest editor for the Springer Journal of Design Automation of Embedded Systems for the special issue on on Networks on chips: design flows and case studies.

Previous Positions

Senior Principal Research Scientist at NXP Semiconductors (formerly Philips) Research (September 1995 to December 2009).
Part-time Adjunct (Full) Professor (Buitengewoon Hoogleraar) at Computer Engineering group at the Delft University of Technology (February 2007 to December 2009).
Post-doctoral positions at the Departamento de Informatica, Universidade Federal de Pernambuco, Brazil, and Dipartimento di Scienze dell'Informazione, Universita di Roma "La Sapienza", Italy (1993-1995).
My PhD in Computer Science is from the Laboratory for Foundations of Computer Science, of the University of Edinburgh, UK (1998-1993). My thesis treated Embedding Hardware Description Languages in Proof Systems, which involved operational semantics for a subset of the ELLA hardware description language, and embedded this semantics in the higher-order-logic proof system Lambda, and proving various properties about the embedded semantics, formal hardware synthesis, and symbolic simulation.
My BSc in Computer Science and Pure Mathematics is from the Computer Science department of the University of Wales, UK (1984-1988).

Previous Research Topics

automated theorem proving for hardware verification. In particular, my PhD thesis describes the embedding of the formal semantics of a hardware description language (ELLA, VHDL, etc.) in the Lambda higher-order logic theorem prover.
high-level hardware synthesis design flow for high-throughput video processing, in particular the Philips Phideo architecture and design flow.
on-chip communication protocols for global (interchannel) resource management, and dynamic reconfiguration.

More information

In increasing information content, but surely out of date:

A respectable passport photograph for work purposes
50 word research biography
120 word research biography
CV