Professor Embedded System Architectures
Eindhoven University of Technology ( TU/e ),
Faculty of Electrical Engineering
Electronic Systems (ES)
FLUX building (4.134)
De Rondom 70
5612 AP Eindhoven
tel: (+31) 40 247 5462 / 5195
email: h.corporaal at tue.nl
- News items
- Several openings for PhD or PostDocs (Dec 2022):
reseach in Deep Learning context.
- Seamless Design of Smart Edge Processors.
- Topics :
- ULP CGRAs for Dynamic ANNs and SNNs,
- Code generation / compiler flow,
- Compositional performance analysis,
- Design Space Exploration for smart processors,
- Composable and secure SoC design.
- Joint PhD position with Ikerlan (Spain) and GML
(Eindhoven) on Neuromorphic
processing within the NimmbleAI EU project.
- New seminal paper on Flexibility: How
flexible is your computing system?
- The first in-depth article about defining and
measuring the flexibility of a CPU / GPU /
accelerator or FPGA implementation.
- New paper on: ConvFusion: A Model for Layer
Fusion in Convolutional Neural Networks
- In-depth modeling of
layer fusion in Deep Neural Networks, and its
- Fusion is the next step in
getting higher data reuse in ANNs, and therefore in
energy reduction and performance improvement of ANN
- April 2022: EU project granted, CONVOLVE: Seamless design of
Smart Edge Processors
- HORIZON-CL4 project with 18 partners
- Our large program on Efficient Deep
Learning, supported by NWO and over 30
industrial companies, is in its 3rd year. Kick-off was in
January 2019. This program contains 7 projects.
- The ZERO perspectief
program, on zero energy systems, started early 2018,
is now in its 4th year. This program contains 5 projects.
- Nov 22-25, 2021: ASCI-EDL
course on Efficient Deep Learning
- New book on CGRAs
- Blocks, Towards Energy-efficient, Coarse-grained
Mark Wijtvliet, Henk Corporaal, Akash Kumar
Research and running projects
All my projects, both
currently active projects and finished projects.
This includes projects executed at TUD (Delft University of
Technology) (1986-2001), and at TU/e (Eindhoven University of
Technology), since 2001.
My current research is executed withing the PARSE laboratory.
Parallel Architecture Research Eindhoven
- This is the main site of our TU/e Computer Architecture
- Among others, we are researching CGRAs, coarse grain
reconfigurable architectures for flexible and extreme low energy
computing; see our CGRA website
- An overview of most of my current and previous Courses
- Includes course at TU/e (Eindhoven), TUDelft, Leiden
University, NUS (National Univ. of Singapore), and for ASCI
(Advanced Institute on Computing and Imaging, The
- Interested in a mini Network-on-Chip targeted towards FPGAs?
Check out our
mMIPS Network page.
We used this in several courses on computer architecture.
- My PhD & PDEng students at TU/e
/ TUDelft / KUleuven
- Master students (pdf) at TU/e and TUDelft, since 1986
- Literature suggestions on
computer architecture and embedded systems. Overview of
interesting conferences and journals.
Software and Tools from our group
- Extension of SDF: SADF
(Scenario Aware Data Flow), combining analytic power of
(C)SDF with dynamism
- MAMPS Multi-Application
- SDF3: SDF For
Free, a set of high freely available SDF (Synchronous Data Flow)
and CSDF (Cyclo-Static Data Flow) analysis, transformation,
graph generation and visualization tools
System-Level Design with the SHE Methodology.
POOSL (Parallel Object-Oriented Specification Language) is used
to describe, analyse and synthesize hard- and soft-realtime
systems. Synthesis is correct modulo a small timing deviation,
i.e. the implemented system has the same timing properties as
the high level description in POOSL.
tools: Generate simulation models from XML specifications
of NoC-based MPSOC systems.
- Always wanted to know what users do with your products? Check
within the soft
- Is your application dynamism getting out of control? Check our
How to contact me
Phone: (+31) 40-247 5462 / 5195
Fax: (+31) 40-243 3066
E-Mail: H.Corporaal at tue dot