Programming Multi-processor Embedded
A typical next-generation embedded multi-media system is a
mobile device that combines high-quality realtime video processing with
acceptable usage times between recharges (e.g., mobile phones, gaming devices,
pda's). These systems increasingly need high-performance, low-power compute
platforms. The solution is found in multi-processor systems integrating many
average-speed and energy-efficient processing elements on a single chip.
Future generations of single-chip multi-processor systems require novel programming techniques that fully exploit the properties of embedded multi-media systems to guarantee not only functionally correct behavior of an application but also desired timing- and energy-related properties.
Our first major goal in the project is to develop a computational-network framework that addresses these issues. We aim at both a sound theoretical framework and a programming environment. Important is the study of analysis techniques that provide insight in concurrency-, timing-, and energy-related properties at the specification level without fully implementing an application.
A second major goal are techniques to map computational-networks onto single-chip multi-processor systems. These techniques must optimize execution time, memory usage, and energy consumption and allow tradeoffs. Interesting questions are how novel on-chip interconnection networks influence timing, memory usage, and energy dissipation of interprocess communication, and how to adapt the granularity of concurrency in a computational-network to the resources in a multi-processor system.