Instruction videos for 5LID0

5LID0 on canvas

The test program used in this lab (compiled using the tools from 5EIB0).

If you have suggestions to improve the videos with, for instance, subtitles please give us a note with the time in the video and the annotation you suggest.

Lab 1 Functional Verification

  1. Setup
  2. Functional Verification

Lab 2 Logic Synthesis

  1. Interactive synthesis
  2. Starting non-interactive synthesis
  3. Synthesis reports
  4. Simulation and detailed power analysis
  5. Power report comparison
  6. Static timing analysis

Lab 3 Placement and Routing

  1. Introduction Innovus
  2. Design import
  3. Analysis settings
  4. Floorplanning 1
  5. Floorplanning 2
  6. Floorplanning 3
  7. Floorplanning sroute
  8. Floorplanning fixing/optimization
  9. Floorplanning cell placement
  10. Floorplanning saving
  11. Clock tree synthesis
  12. Detailed routing
  13. Timing verification
  14. Power simulation
  15. Signoff: extraction and timing

Videos of 2017

Videos 2017, please realize that in 2017 a different microprocessor is used, and also older versions of the tools are being used.