Embedded Computer Architecture

Lab exercise 2: VLIW Architecture customization

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Slides

Assignment submission

Welcome to the assignment submission webpage, this page allows you to submit your code and report for evaluation. Only in case submitting via this website fails the code should be emailed! In order to submit please follow the following steps:

  1. If you do not have a server account yet (used for the Silicon Hive and GPU assignment) request one here
  2. The submission form only allows ZIP and RAR files, therefore zip your code and report before sumbission (preferably in one file).
  3. Select the file you want to submit via the 'Browse...' button.
  4. Fill in your username and your ORIGINAL password that you received for your server account.
  5. Click submit to submit your file.
  6. Check if the submission was successful on the result page, if not try again. If it keeps failing please email us your files (but only if it fails).
The file you submit will be timestamped with the date and time of submission, therefore we can see if a submission was made after the deadline. Submitting after the deadline is not blocked by the submission system but might have consequences in the grading, so be on time!

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FAQs

  1. Question: Error - memory pearl_is3_bp_dmem_mem not found.

    Answer: Use the memory name without pearl_is3_. The correct name in this case should be bp_dmem_mem.


  2. Question: When using Xming and Putty in combination with nedit and the corebrowser, at some zoom levels fonts are unclear.

    Answer: It can be fixed by downloading and installing the following: https://sourceforge.net/projects/xming/files/Xming-fonts/7.5.0.34/. Please install all the fonts in the package


  3. Question: Processor design gets stuck in scheduling stage; it keeps generating random seeds and doesn't terminate.

    Answer: (From Menno) The problem occurs in a compile stage, but as part of generating the core. This indicates that this happens during code generation for emulation functions.

    What this usually means is that the core has additional standard operations, but placed in issue slots that are not sufficiently connected. The scheduler then tries to use these operations for generic C code mapping, but it can not find a route to get arguments into them or results out.

    So, your core has been generated and you could actually start using it (although you could not use emulation for integer divide and float). However, you do need to take into account that connections are missing within the core and also during building of other code (using exhaustive scheduler), you can quickly run into this same issue.

    If you do not want to do this, there are several other "solutions":

    • The most elegant solution is to add the exact right amount of connectivity to your core to allow the scheduler to route inputs and outputs. You will need to experiment with providing additional interconnections in your core.
    • If you do not want to modify the processor and you just want to get rid of the error message, but do not need emulation (int division, floats), you can switch off the emulation library construction, by adding the following line to your core Makefile: NO_EMULATION_LIB = 1
    • If you do need emulation and you do not want to change the core, check the error messages carefully to determine in which function the problem occurs. Then you look at the sources in $HIVEBIN/../share/runtime/emulate/ to find the function in there. It is likely that you will find a pre-processor macro through switch controlling exhaustive scheduling for this function. For example, to switch off exhaustive scheduling for unsigned division, you can add the following line to your processor Makefile: HDFCFLAGS+=-DNO_DIVU_PIPELINING