Assignment: AES encryption

Before starting

  1. Read the overview and setup file and make yourself familiar with Linux environment. The pointers to relevant documentation are also given in this introduction guide.
  2. Complete the cookbook on compiling core and answer the questions given there.
  3. Complete the cookbook on compiling program and answer the questions given there.
  4. Read the documentation on basic power estimation in the website below.

Deadline

The deadline for this assignment is December 21st 2015, 23:59 (UTC+1)

The assignment

In this assignment, you will be exploring AES encryption on a SiliconHive processor. Start with porting the application to the host processor then look at migrating the encryption kernel to the pearl processor.
  1. This program can be compiled for a general processor. Make the modifications to make it run on both processors (pearl and pearl_is3) generated in Step 2. How many cycles does it take on each processor?
  2. Modify the processor pearl_is3 such that the parallelism in the given application can be exploited. (Hint: There are many potentially parallel memory accesses in the program)
  3. Optimize the application code of the encryption kernel for your target processor. (Hint: Refer to Chapter 8 of HiveSDK.pdf for tips.)
  4. Check the cycle count and power consumption of your application on your processor.
  5. Iterate over steps (2), (3) and (4) to produce an overview of the tradeoffs between the cycle count, and the area and energy consumption of the proposed processor designs.

Deliverables

A small report (max 4 pages A4) containing:
  1. The answers to the questions in both the cookbooks (compiling a processor and compiling a program)
  2. The cycle count, and energy and power consumption numbers for both the pearl and pearl_is3 processors
  3. A description of your final processor architecture including the following
    • A screen-shot from corebrowser
    • Explain the optimizations made to the application.
    • How good is your hardware utilization (check the html directory and report results)?
    • Report energy, area and T execution of the architectures / mappings you have researched.
    • You may add a Pareto curve of the considered architectures (either one 3-D plot, or several 2-D; in the latter case e.g. Time-energy and Time-Area)
    • Justify your architecture, and explain the trade-offs in processor-area, application cycle count, power and energy consumption.
Make sure to clearly mention your name and student number on the front page of your report.