System Simulation of Memristor Based Computation In Memory Platforms
Processors based on the von Neumann architecture show inefficient performance on many emerging data-intensive workloads. Computation in-memory (CIM) tries to address this challenge by performing the computation on the data location. To realize CIM, memristors, that are deployed in a crossbar structure, are a promising candidate. Even though extensive research has been carried out on memristors at device/circuit-level, the implications of their integration as accelerators (CIM units) in a full-blown system are not studied extensively.
This paper evaluates a complete system consisting of a TTA based host core integrating one or more CIM units. This evaluation is based on a cycle-accurate simulation. For this purpose we designed a simulator which a) includes the memristor crossbar operations as well as its surrounding analog drivers, b) provides the required interface to the co-processing digital elements, and c) presents a micro-instruction set architecture (micro-ISA) that controls and operates both analog and digital components. It is used to assess the effectiveness of the CIM unit in terms of performance, energy, and area in a full-blown system. It is shown, for example, that the EDAP for the deep learning application, LeNet, is reduced by 84\% in a full-blown system deploying memristor based crossbars.
- System Simulation of Memristor Based Computation In Memory Platforms
A. BanaGozar, K. Vadivel, J. Multanen, P. Jääskeläinen, S. Stuijk and H. Corporaal
In International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, SAMOS 20 Proceedings, pages xyz-xyz. SAMOS, Greece, 5-9 July 2020. ACM Press, New York, NY, USA, 2020. (abstract, pdf, doi).